B&B Electronics PC Watchdog Timer Card ATRWDT Bedienungsanleitung Seite 6

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P104-WDG-CSM User Manual
6
The Watchdog card can generate an interrupt request one Counter 0 period-width before the
reset timeout. For example, if a reset period of 60 seconds is used with a 5 millisecond delay
stored in Counter 0 (the result of a maximum value delay), an interrupt would occur at 59.995
seconds. This gives the Interrupt handler software 5 milliseconds to refresh the watchdog
before a reset action occurs. This should allow your software to take corrective actions if the
system software continued to run but the software that should have reset the watchdog had
failed. Discussion of these Watchdog Programming Options is given in a later chapter.
Figure 1-1: Block Diagram
Watchdog Models
There are three basic models of this board. Special variations can be configured by contacting
the sales department. (See Chapter 5 for pinout.)
P104-WDG-E: Economy Basic Watchdog
This model provides a fully programmable watchdog with open collector outputs that
can reset the computer. Both “WDRST” and “not WDRST” outputs are provided on the
four pin header connector:
a. Open collector watchdog output, active HIGH, 1k pull-up to 5V.
b. Open collector watchdog output, active LOW, no current limiting.
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